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Product details
Part number | TK25V60X5 |
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Manufacturer | Toshiba Corporation Semiconductor |
Technical file | |
EDA/CAD |
Attribute name | Attribute value |
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Creation date | 2016-03-11 |
Last revised date | 2021-12-27 |
Class code | XJA709 |
Product's class name | MOS FETS |
Product lifecycle stage | Development in progress |
Package type | 2-8T1A/DFN8x8 |
Body length[Min] | 7.9mm |
Body length[Typ] | 8mm |
Body length[Max] | 8.1mm |
Body breadth[Min] | 7.9mm |
Body breadth[Typ] | 8mm |
Body breadth[Max] | 8.1mm |
Body height[Min] | 0.75mm |
Body height[Typ] | 0.85mm |
Body height[Max] | 0.95mm |
Mounting method | Surface mount technology |
Pin Pitch[Typ] | 2mm |
Number of terminals[Nom] | 5 |
AEC compliant | - |
Channel temperature[Max] | 150Cel |
Number of transistors[Nom] | 1 |
Channel type | N ch |
Drain current (DC)[Max] | 25A |
Drain current (pulse)[Max] | 100A |
Allowable power dissipation[Max] | 180W |
Gate-source threshold voltage[Min] | 3V |
Gate-source threshold voltage[Max] | 4.5V |
Drain-source voltage[Max] | 600V |
Gate-source voltage[Max] | 30V |
Drain-source current[Max] | 100microA |
Drain-source on-resistance @10V[Typ] | 0.125Ohm |
Drain-source on-resistance @10V[Max] | 0.15Ohm |
Gate-source voltage at R_DS(on)_@10V[Typ] | 10V |
Thermal resistance 2(j-mb or j-c or ch-c)[Max] | 0.694Cel/W |